Cadence and Nvidia launch Maestro models to run chip-design agents

Cadence Design Systems has introduced the Maestro AI Model Portfolio, a family of models built with Nvidia for electronic design automation. As reported by StreetInsider on October 26, the models are built on Nvidia’s Nemotron family. They run agents inside Nvidia’s OpenShell, which Cadence says keeps agent execution secure.

What Cadence says the models do

Maestro is meant to power Cadence’s existing agent lines: AuraStack, ChipStack, InnoStack and ViraStack. Cadence claims up to 30% better quality of results and up to five times better token efficiency than general-purpose models. Those are the company’s own “up to” figures, and no independent benchmark has been published. Early access is planned for the fourth quarter of 2026. Customers can run the models on Cadence’s cloud, on public clouds or on their own premises.

Japanese chip designer Socionext is deploying InnoStack and expects up to five times higher productivity, according to the announcement. Nvidia’s Tim Costa is quoted backing the collaboration.

How widely agents are used

Paul Cunningham of Cadence told The Next Platform that 20% to 30% of chips now in development use AI agents. That is the company’s estimate, not an industry survey.

Why it matters (analysis)

Chip design is skilled, slow work, and design tools are a bottleneck for the AI infrastructure boom. Specialised models that understand EDA tasks could cut costs if the claims hold up. They also tie Nvidia’s model stack into the tools used to design rival chips. This connects to broader questions about AI and work, since vendors are pitching agents as productivity multipliers for engineers.

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This report is not legal, financial, or health advice. See the disclaimer.